Power Electronics MCQs 2026

70 questions with detailed answers · 46 from past papers · 7 quiz batches available

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Page 1 of 1Questions 1–10 of 70
  1. Q1Past Paper · PPSC/FPSC/NTSmedium

    Chopper used in DC motor speed control varies

    1. Aaverage armature voltage by changing duty cycle
    2. Bfield flux only without armature voltage effect ever for speed control in shunt motor context both matter but armature chopper is classic
    3. Cair gap length physically without electronics
    4. Dnumber of poles without electrical control
    💡 Explanation:

    Armature voltage control below base speed uses chopper.

  2. Q2hard

    Regenerative chopper operation returns energy when

    1. Amotor always motoring without reversal of power flow ever
    2. Bduty cycle is zero always with switch permanently open without regeneration path design
    3. Cfuse blows on overload only without energy return
    4. Dload drives current back to source during braking
    💡 Explanation:

    Four-quadrant chopper allows bidirectional power flow.

  3. Q3medium

    Current ripple in chopper output depends on

    1. Aonly input DC voltage magnitude without L or fsw
    2. Bonly PID proportional band without power stage
    3. Cinductance, switching frequency and load current
    4. Donly insulator creepage distance only
    💡 Explanation:

    Higher L and fsw reduce ripple for given operating point.

  4. Q4hard

    Discontinuous conduction mode in buck chopper occurs when

    1. Ainductor current never reaches zero ever in all loads without exception
    2. Binductor current falls to zero before next switching cycle
    3. Cinput voltage equals output always
    4. Dduty cycle equals unity always in DCM definition boundary only at boundary case
    💡 Explanation:

    Light load or low L causes DCM with different gain equation.

  5. Q5Past Paper · PPSC/FPSC/NTSmedium

    Thyristor chopper requires

    1. Aonly natural commutation from AC line zero always on DC bus chopper without AC zero
    2. Bno commutation because SCR turns off automatically on DC without design ever
    3. Conly gate pulse removal without commutation network on DC
    4. Dforced commutation circuit to turn off SCR
    💡 Explanation:

    DC supply lacks natural zero; commutation is mandatory for SCR.

  6. Q6Past Paper · PPSC/FPSC/NTSeasy

    IGBT/MOSFET choppers operate at

    1. Ahigher switching frequencies than SCR choppers with simpler control
    2. Bonly line frequency 50 Hz without PWM ever as defining advantage of modern devices
    3. Czero frequency DC without switching ever
    4. Donly sub-hertz without filters ever as typical modern design point
    💡 Explanation:

    Modern devices enable kHz switching and compact filters.

  7. Q7medium

    Input filter on chopper reduces

    1. Aoutput voltage ripple only at load without affecting input
    2. Bmotor slip without electrical connection
    3. Ccurrent ripple reflected to DC source
    4. Dsymmetrical component unbalance only on AC lines without DC chopper relevance
    💡 Explanation:

    Source-side capacitor/inductor limits conducted EMI and ripple.

  8. Q8hard

    Buck-boost chopper output voltage polarity is

    1. Asame polarity always as input without inversion ever in ideal buck-boost
    2. Balways positive without inversion regardless of topology name
    3. Cindependent of duty cycle always
    4. Dinverted compared to input and magnitude depends on D
    💡 Explanation:

    Buck-boost inverts and steps up or down depending on D.

  9. Q9Past Paper · PPSC/FPSC/NTSmedium

    Forced commutation is required in

    1. AAC diode rectifier on resistive load only without SCR
    2. Bpassive RC snubber only without switches
    3. CDC choppers and inverters using SCRs
    4. Donly Buchholz relay operation
    💡 Explanation:

    External circuit diverts or reverses current to turn off SCR.

  10. Q10hard

    dv/dt rating of SCR specifies

    1. Amaximum rate of rise of anode voltage without spurious turn-on
    2. Bmaximum gate current only
    3. Cmaximum on-state voltage drop only
    4. DPID derivative gain only
    💡 Explanation:

    High dv/dt can trigger capacitive displacement current.

  11. Q11hard

    di/dt rating limits

    1. Aonly reverse recovery of diode without relation
    2. Bonly line sag calculation
    3. Conly distance relay reach only
    4. Drate of rise of anode current at turn-on to protect device
    💡 Explanation:

    Excessive di/dt causes hot spots during spreading of conduction area.

  12. Q12medium

    Gate trigger current is

    1. Asame as holding current always
    2. Bequal to anode latching current always
    3. Cminimum gate current to switch SCR from off to on state
    4. Dindependent of junction temperature always without derating
    💡 Explanation:

    Gate drive must exceed IGT at operating temperature.

  13. Q13Past Paper · PPSC/FPSC/NTSmedium

    Two SCRs in anti-parallel on AC switch line allow

    1. Aonly half-wave rectification without diodes
    2. Bonly DC chopper operation without commutation
    3. Conly open-loop step response measurement only
    4. Dcontrol of power in both half cycles
    💡 Explanation:

    Anti-parallel pair conducts alternate half cycles when triggered.

  14. Q14Past Paper · PPSC/FPSC/NTSmedium

    RC snubber across SCR protects against

    1. Aonly di/dt at turn-on without capacitance
    2. Bdv/dt and voltage transients
    3. Conly gate oxide breakdown from overcurrent only without voltage effect
    4. Donly motor slip measurement
    💡 Explanation:

    Snubber damps rapid voltage changes.

  15. Q15easy

    On-state voltage drop of high-power SCR is typically

    1. Aabout 1 to 2 V depending on current rating
    2. Bhundreds of volts always when conducting
    3. Czero always
    4. Dequal to reverse peak voltage always
    💡 Explanation:

    Conduction loss is I×Von in on state.

  16. Q16Past Paper · PPSC/FPSC/NTSmedium

    SCR is preferred over transistor in high-power AC line applications when

    1. Aswitching frequency exceeds 1 MHz always without IGBT
    2. Bonly microampere currents are switched
    3. Cline commutation is available and high voltage/current rating needed economically
    4. Donly battery voltage below 1 V
    💡 Explanation:

    SCR excels in high-power line-frequency controlled rectifiers.

  17. Q17hard

    Reverse conducting SCR integrates

    1. Aanti-parallel diode in same package for commutation and freewheeling
    2. BIGBT with anti-parallel SCR only without diode
    3. Conly vacuum interrupter contacts
    4. Donly PID integral windup clamp only
    💡 Explanation:

    Integrated diode aids inverter and chopper circuits.

  18. Q18hard

    Light activated SCR (LASCR) is triggered by

    1. Aonly mechanical vibration of heat sink without photons
    2. Bonly distance relay carrier signal
    3. Conly symmetrical component calculator only
    4. Dincident light on sensitive gate region
    💡 Explanation:

    Optical triggering provides galvanic isolation.

  19. Q19Past Paper · PPSC/FPSC/NTSeasy

    Half-wave rectifier with resistive load produces

    1. Aoutput with one conduction half cycle per input cycle
    2. Bfull DC without ripple without filter
    3. Cpure sinusoidal AC at output always
    4. Dthree-phase balanced output always
    💡 Explanation:

    Only positive or negative half cycles appear at load.

  20. Q20Past Paper · PPSC/FPSC/NTSeasy

    Full-wave centre-tap rectifier uses

    1. Aone diode only on three-phase supply without transformer
    2. Bfour SCRs in bridge without AC input
    3. Conly inductor filter without diodes
    4. Dtwo diodes and centre-tapped transformer secondary
    💡 Explanation:

    Centre tap provides two half-cycle paths.

  21. Q21Past Paper · PPSC/FPSC/NTSeasy

    Bridge rectifier with four diodes gives

    1. Ahalf-wave only always
    2. BDC with frequency equal to input without ripple
    3. Crequires forced commutation for diodes always
    4. Dfull-wave output without centre-tapped transformer
    💡 Explanation:

    Bridge is standard for single-phase full-wave rectification.

  22. Q22Past Paper · PPSC/FPSC/NTSmedium

    Average DC voltage of single-phase full-wave bridge (ideal) is

    1. AVm/π only
    2. B2Vm/π where Vm is peak AC voltage
    3. C2Vm only without division
    4. DVm/2 only
    💡 Explanation:

    Full-wave average is twice half-wave value: 2Vm/π.

  23. Q23Past Paper · PPSC/FPSC/NTSmedium

    Three-phase half-wave rectifier (three diodes) has ripple frequency

    1. Aequal to supply frequency only
    2. Bsix times supply frequency always
    3. Cthree times supply frequency
    4. Dzero ripple without filter always
    💡 Explanation:

    Three pulses per cycle give 3f ripple.

  24. Q24Past Paper · PPSC/FPSC/NTSeasy

    Three-phase full-wave bridge rectifier uses

    1. Atwo diodes only on single phase always
    2. Bone SCR without diodes on DC bus only
    3. Csix diodes or SCRs for two pulses per phase per cycle
    4. Donly RC snubber without switches
    💡 Explanation:

    6-pulse bridge is standard industrial rectifier.

  25. Q25Past Paper · PPSC/FPSC/NTSmedium

    Output ripple frequency of six-pulse rectifier is

    1. Athree times only always
    2. Bsix times the supply frequency
    3. Csame as supply without harmonics
    4. Dzero with any load always
    💡 Explanation:

    Six pulses per cycle reduce ripple compared to 3-pulse.

  26. Q26Past Paper · PPSC/FPSC/NTShard

    Power factor of uncontrolled three-phase rectifier is

    1. Aless than unity and depends on load and firing angle
    2. Balways unity without harmonics
    3. Czero always
    4. Dindependent of load current always
    💡 Explanation:

    Harmonic currents and phase displacement reduce displacement and distortion PF.

  27. Q27Past Paper · PPSC/FPSC/NTSmedium

    Controlled rectifier uses SCRs to adjust

    1. Aonly frequency of AC input without inversion
    2. Baverage output voltage by varying firing angle α
    3. Conly power factor to unity always without control
    4. Donly filter inductance without delay angle
    💡 Explanation:

    Delaying gate pulses reduces output DC voltage.

  28. Q28Past Paper · PPSC/FPSC/NTSmedium

    As firing angle α increases in controlled rectifier, average output voltage

    1. Aincreases linearly without limit above input peak always
    2. Bdecreases
    3. Cremains constant always
    4. Dbecomes independent of AC supply
    💡 Explanation:

    Greater delay angle reduces conduction interval and average voltage.

  29. Q29hard

    Extinction angle β in line-commutated inverter mode must be

    1. Azero for safe operation always
    2. Bnegative without limit
    3. Cequal to firing angle only without overlap
    4. Dgreater than recovery time of devices plus safety margin
    💡 Explanation:

    Insufficient extinction angle causes commutation failure.

  30. Q30hard

    Overlap angle μ in rectifiers occurs due to

    1. Asource inductance causing simultaneous conduction of phases
    2. Bonly load capacitance without source impedance
    3. Conly PID derivative kick
    4. Donly Buchholz gas pressure alone
    💡 Explanation:

    Commutation overlap reduces average output voltage slightly.

  31. Q31easy

    Isolation transformer at inverter output provides

    1. Agalvanic isolation and voltage matching
    2. Bforced commutation for SCR always without electronics
    3. Csymmetrical component transformation only without galvanic isolation benefit
    4. Ddistance protection reach setting only
    💡 Explanation:

    Transformer separates DC system ground from AC load.

  32. Q32hard

    Overmodulation in PWM inverter occurs when

    1. Afiring angle is below zero in rectifier only without PWM context
    2. BDC link is unregulated without any voltage ripple ever
    3. Creference exceeds linear range and low-order harmonics increase
    4. Dgate dead time is infinite always
    💡 Explanation:

    Six-step region may appear at high modulation index.

  33. Q33Past Paper · PPSC/FPSC/NTSeasy

    UPS inverter must maintain

    1. Aonly rectifier operation without battery ever for offline UPS definition
    2. Bstable voltage and frequency during supply outage using stored energy
    3. Conly line sag calculation on EHV lines without battery
    4. Donly Buchholz alarm without static switch
    💡 Explanation:

    Inverter section supplies critical load from DC energy storage.

  34. Q34hard

    Multilevel inverter reduces

    1. Aneed for any switching devices entirely without semiconductors
    2. Bdv/dt stress and harmonic content by stepping output voltage levels
    3. CDC link voltage to zero always without capacitors
    4. Dmotor slip to zero always without load torque consideration
    💡 Explanation:

    NPC or cascaded H-bridge builds stepped waveform.

  35. Q35Past Paper · PPSC/FPSC/NTSeasy

    DC chopper converts

    1. Afixed DC voltage to variable average DC voltage by switching
    2. BAC to fixed DC only without switching
    3. CDC to AC directly without inversion stage terminology confusion—chopper is DC-DC
    4. DAC to AC at same frequency without electronic switching only using transformer taps without switches
    💡 Explanation:

    Chopper is DC-DC converter using high-frequency switching.

  36. Q36Past Paper · PPSC/FPSC/NTSeasy

    Step-down (buck) chopper output voltage is

    1. Alower than input DC voltage
    2. Balways higher than input without exception
    3. Cequal to input always without switching
    4. Dunrelated to duty cycle always
    💡 Explanation:

    Buck converter steps down by interrupting input with inductor filter.

  37. Q37Past Paper · PPSC/FPSC/NTSeasy

    Step-up (boost) chopper can produce output voltage

    1. Aonly lower than input always
    2. Bhigher than input DC source
    3. Cexactly zero without inductor ever in all operating modes
    4. Dwithout any inductor or energy storage element ever in ideal boost
    💡 Explanation:

    Boost stores energy in inductor then releases at higher voltage.

  38. Q38Past Paper · PPSC/FPSC/NTSeasy

    Duty cycle D of chopper is defined as

    1. AOFF time to period only
    2. Binput voltage to output voltage always without switching
    3. Cpeak current to average current only without time definition
    4. Dratio of ON time to total switching period
    💡 Explanation:

    D = Ton/T controls average output voltage.

  39. Q39Past Paper · PPSC/FPSC/NTSmedium

    Average output voltage of ideal buck chopper is

    1. AVin/D always
    2. B(1-D)×Vin for buck—note boost is different
    3. CD × Vin
    4. Dzero regardless of D always
    💡 Explanation:

    Buck VO = D·Vin for continuous conduction mode ideal case.

  40. Q40Past Paper · PPSC/FPSC/NTSmedium

    Average output voltage of ideal boost chopper is

    1. AVin / (1 − D)
    2. BD × Vin which is buck relation not boost
    3. CVin × (1 − D) always
    4. Dindependent of D always
    💡 Explanation:

    Boost VO = Vin/(1-D) in ideal CCM.

  41. Q41Past Paper · PPSC/FPSC/NTSeasy

    Freewheeling diode in chopper circuit

    1. Ablocks inductor current always when switch OFF causing infinite voltage spike always without diode
    2. Bprovides path for inductor current when switch is OFF
    3. Creplaces main switching device entirely without switch
    4. Dmeasures fault impedance for distance relay only
    💡 Explanation:

    Diode continues current and prevents destructive voltage spike.

  42. Q42Past Paper · PPSC/FPSC/NTSeasy

    Silicon controlled rectifier (SCR) is a

    1. Atwo-terminal diode only without control
    2. Bfour-layer PNPN device with three terminals anode, cathode and gate
    3. Cvacuum triode only
    4. Dtransformer core only
    💡 Explanation:

    SCR is the basic controlled power semiconductor switch.

  43. Q43Past Paper · PPSC/FPSC/NTSeasy

    SCR turns ON when

    1. Acathode is positive with respect to anode always
    2. Bgate alone turns off device in DC circuit without commutation
    3. Creverse voltage alone triggers conduction
    4. Dgate pulse is applied while anode is positive with respect to cathode and forward biased
    💡 Explanation:

    Forward bias plus gate trigger initiates regeneration.

  44. Q44Past Paper · PPSC/FPSC/NTSmedium

    Latching current of SCR is

    1. Aminimum anode current to maintain ON state after gate pulse removal
    2. Bgate current only
    3. Creverse leakage only
    4. Dholding current always greater than latching
    💡 Explanation:

    Above latching current, regenerative action sustains conduction.

  45. Q45Past Paper · PPSC/FPSC/NTSmedium

    Holding current is

    1. Aalways equal to latching current exactly in all datasheets without exception
    2. Bgate trigger current only
    3. Cminimum anode current below which SCR turns OFF
    4. Dpeak repetitive forward voltage only
    💡 Explanation:

    Holding current is slightly lower than latching current.

  46. Q46Past Paper · PPSC/FPSC/NTSeasy

    In forward blocking state SCR

    1. Aconducts heavily without gate
    2. Bblocks current with anode positive until triggered
    3. Cconducts in reverse direction freely
    4. Dbehaves as short circuit always
    💡 Explanation:

    Junctions block forward current until gate firing.

  47. Q47Past Paper · PPSC/FPSC/NTSeasy

    SCR in reverse bias

    1. Ablocks current like a reverse-biased diode until breakdown rating exceeded
    2. Bconducts like a forward diode always
    3. Cturns on with gate pulse in reverse conduction mode normally
    4. Dhas no peak inverse voltage rating
    💡 Explanation:

    PIV rating limits reverse voltage withstand.

  48. Q48Past Paper · PPSC/FPSC/NTSmedium

    SCR cannot be turned OFF by removing gate signal alone in DC circuit because

    1. Agate has no role in turn-on
    2. Banode-cathode becomes superconducting permanently
    3. Cdevice is unipolar only
    4. Dregenerative internal feedback sustains conduction once latched
    💡 Explanation:

    Commutation circuit must reduce anode current below holding level.

  49. Q49Past Paper · PPSC/FPSC/NTSeasy

    Natural commutation of SCR occurs in

    1. AAC circuits when current passes through zero
    2. Bpure DC bus without auxiliary circuit always
    3. Conly open-loop control systems
    4. Donly transformer oil only
    💡 Explanation:

    Line frequency zero crossing turns off SCR in AC applications.

  50. Q50hard

    Interphase transformer in dual three-phase rectifiers helps

    1. Aeliminate all harmonics completely without any remaining ripple
    2. Breplace all SCRs with diodes only on DC side without AC
    3. Cmeasure distance to fault on line only
    4. Doperate two 6-pulse bridges with 30° phase shift for 12-pulse operation
    💡 Explanation:

    12-pulse arrangement reduces 5th and 7th harmonics.

  51. Q51Past Paper · PPSC/FPSC/NTSeasy

    Filter inductor on DC side of rectifier

    1. Aincreases ripple amplitude always
    2. Bblocks DC while passing only AC ripple without inductance effect
    3. Csmooths current and reduces ripple
    4. Dreplaces need for diodes entirely
    💡 Explanation:

    Large L forces nearly constant load current.

  52. Q52Past Paper · PPSC/FPSC/NTSeasy

    Filter capacitor on DC side of rectifier

    1. Asmooths only current without affecting voltage ripple
    2. Beliminates need for transformer always
    3. Csmooths voltage ripple
    4. Dprovides forced commutation for SCR in all DC circuits automatically without design
    💡 Explanation:

    Capacitor holds up output voltage between pulses.

  53. Q53Past Paper · PPSC/FPSC/NTSeasy

    Diode rectifier does not require

    1. AAC input voltage ever
    2. Btransformer or source impedance ever
    3. Cany heat sinking on diodes ever
    4. Dgate firing or commutation circuit
    💡 Explanation:

    Diodes turn off naturally at current zero in AC supply.

  54. Q54Past Paper · PPSC/FPSC/NTSmedium

    Harmonics generated by rectifiers can cause

    1. Aimproved power factor without filters always
    2. Bdistortion, heating and relay misoperation on the supply system
    3. Czero neutral current in all cases always
    4. Dautomatic voltage regulation without STATCOM always
    💡 Explanation:

    Non-linear rectifier currents inject characteristic harmonics.

  55. Q55hard

    Dual converter uses two bridges to provide

    1. Aonly half-wave rectification without reversal
    2. Bregenerative four-quadrant DC control
    3. Conly open-loop motor speed without feedback
    4. Donly fuse protection without thyristors
    💡 Explanation:

    One bridge rectifies and other inverts for bidirectional DC power flow.

  56. Q56Past Paper · PPSC/FPSC/NTSmedium

    Voltage source inverter (VSI) has

    1. ADC voltage source with capacitor at input and switches create AC output
    2. BDC current source at input with large inductor always as defining feature without alternative
    3. Cno switching devices
    4. Donly diode rectifier without switches on AC side
    💡 Explanation:

    VSI is common in motor drives and UPS with stiff DC link.

  57. Q57hard

    Current source inverter (CSI) has

    1. Acapacitive DC link without inductor as defining element
    2. Blarge DC inductor maintaining nearly constant DC current
    3. Conly passive diodes without controlled switches on output always
    4. Donly SCR without commutation in all modern CSI designs without exception
    💡 Explanation:

    CSI feeds controlled current to load; commutation needed with SCRs.

  58. Q58Past Paper · PPSC/FPSC/NTSeasy

    PWM inverter controls output voltage and harmonic content by

    1. Afixed square wave only at 50 Hz without modulation ever in all drives
    2. Bvarying pulse widths of switched DC voltage
    3. Canalog potentiometer on DC link only without switches
    4. Donly transformer tap changer without switching
    💡 Explanation:

    PWM shapes output waveform by high-frequency switching.

  59. Q59Past Paper · PPSC/FPSC/NTSeasy

    Single-phase H-bridge inverter uses

    1. Atwo diodes only without switches
    2. Bone SCR only on DC positive rail without return path switch
    3. Cfour switches to synthesize AC from DC
    4. Dsix diodes in three-phase bridge only without inversion capability
    💡 Explanation:

    H-bridge alternates polarity across load.

  60. Q60hard

    Third harmonic injection in three-phase inverter PWM helps

    1. Aeliminate all switching losses completely without trade-off
    2. Bincrease DC bus utilization by extending linear modulation range
    3. Creplace PID controller in outer loop always
    4. Dmeasure symmetrical components only without PWM change
    💡 Explanation:

    Third harmonic triplen addition raises fundamental from DC bus.

  61. Q61Past Paper · PPSC/FPSC/NTSmedium

    Dead time in inverter gate signals prevents

    1. Aovermodulation only without shoot-through risk ever
    2. Bnatural commutation in AC line only
    3. Cshoot-through short circuit of DC bus through upper and lower switches
    4. DFerranti effect on transmission line only
    💡 Explanation:

    Brief delay ensures both switches of a leg are not ON together.

  62. Q62Past Paper · PPSC/FPSC/NTShard

    Line-commutated inverter (LCI) feeds power from DC to AC when

    1. Afiring angle is zero always in rectifier only without reversal
    2. BDC voltage is zero always
    3. CSCR firing angle exceeds 90° into inverter mode with sufficient extinction angle
    4. Dload is purely resistive without AC source
    💡 Explanation:

    Inverter operation requires AC voltage to commutate current.

  63. Q63Past Paper · PPSC/FPSC/NTSeasy

    Forced-commutated inverter (e.g., IGBT based) can

    1. Aonly work with synchronous motor at fixed speed without control
    2. Bnot control frequency or voltage
    3. Cnot use PWM ever
    4. Doperate from DC source without relying on AC line for turn-off
    💡 Explanation:

    Self-commutated devices switch independently of line.

  64. Q64Past Paper · PPSC/FPSC/NTSmedium

    Output frequency of variable frequency drive inverter is controlled by

    1. Aonly DC link voltage without changing switch rate ever for frequency change
    2. Bonly transformer turns ratio on output without electronics
    3. Conly fuse rating without switches
    4. Dmodulating switch timing / PWM carrier and reference frequency
    💡 Explanation:

    V/f control adjusts stator frequency for motor speed.

  65. Q65Past Paper · PPSC/FPSC/NTSmedium

    Harmonic filter at inverter output may be required to

    1. Ameet grid code THD limits
    2. Bincrease THD deliberately
    3. Celiminate DC link capacitor always
    4. Dreplace all IGBTs with SCRs without commutation ever in all cases
    💡 Explanation:

    LC filters reduce high-frequency components fed to grid or motor.

  66. Q66hard

    Space vector modulation (SVM) in three-phase inverters

    1. Auses only single-phase H-bridge always without three phases
    2. Boptimizes switching to maximize DC bus usage and reduce harmonics
    3. Celiminates all switching losses without heat sink ever
    4. Dreplaces motor windings entirely
    💡 Explanation:

    SVM selects optimal voltage vectors in α-β plane.

  67. Q67Past Paper · PPSC/FPSC/NTSmedium

    Regenerative braking with inverter drive returns energy by

    1. Ainverting DC link power back to AC supply when motor acts as generator
    2. Bdissipating only in rotor copper without electronics always
    3. Copening fuse links only
    4. Dincreasing line sag only on overhead conductors
    💡 Explanation:

    Active front end or braking chopper handles regenerated energy.

  68. Q68medium

    Square wave inverter output contains

    1. Aonly DC without any AC component ever
    2. Bonly even harmonics without fundamental ever
    3. Cfundamental plus odd harmonics
    4. Dpure sinusoid without harmonics always without filter
    💡 Explanation:

    Quasi-square wave rich in 3rd, 5th, 7th harmonics.

  69. Q69medium

    Chopper efficiency is improved by

    1. Amaximizing dead time without limit always causing shoot-through if too small but excessive dead time hurts output—still minimizing losses is key
    2. Busing only linear regulators without switching always for high power efficiency claim
    3. Copening fuse on every cycle for current limit as efficiency strategy
    4. Dminimizing switching and conduction losses in devices
    💡 Explanation:

    Soft switching and low RDS(on) improve efficiency.

  70. Q70hard

    Soft switching techniques in choppers aim to

    1. Aincrease dv/dt stress on SCR always deliberately
    2. Beliminate inductor from circuit always without replacement
    3. Cswitch at zero voltage or zero current to reduce losses
    4. Dreplace PID with bang-bang only without semiconductor benefit
    💡 Explanation:

    ZVS/ZCS reduce switching energy loss.